High performance DDR architecture in Intel® Core™ processors using 32nm CMOS high-K metal-gate process

@article{Mosalikanti2011HighPD,
  title={High performance DDR architecture in Intel® Core™ processors using 32nm CMOS high-K metal-gate process},
  author={Praveen Mosalikanti and Chris Mozak and Nasser A. Kurd},
  journal={Proceedings of 2011 International Symposium on VLSI Design, Automation and Test},
  year={2011},
  pages={1-4}
}
This paper describes the DDR architecture in Intel® Core™ processors operating up to 1333MT/s and designed in 32nm process technology. The architecture uses adaptive techniques to achieve very low clock jitter (40% margin to spec), data scrambling to reduce simultaneous switching noise and novel training algorithms to improve I/O margins in the presence of crosstalk. A fast wakeup technique allows shutting down the receive path for finer grain power management, reducing standby power by 15%. 

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References

Publications referenced by this paper.
Showing 1-5 of 5 references

Maneatis, A low-jitter process-independent DLL and PLL based on self-biased techniques

J G.
IEEE J. Solid-State Circuits, vol. 31, • 1996
View 6 Excerpts
Highly Influenced

PCM jitter suppression by scrambling, Communications

H. Kasai, S. Senmoto, M. Matsushita
IEEE Transactions on, • 1974
View 4 Excerpts
Highly Influenced

Westmere: A family of 32nm IA processors

2010 IEEE International Solid-State Circuits Conference - (ISSCC) • 2010
View 3 Excerpts

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