High performance 60-GHz coplanar MMIC LNA using InP heterojunction FETs with AlAs/InAs superlattice layer

@article{Fujihara2000HighP6,
  title={High performance 60-GHz coplanar MMIC LNA using InP heterojunction FETs with AlAs/InAs superlattice layer},
  author={Akira Fujihara and Emiko Mizuki and Hiroshi Miyamoto and Yoichi Makino and K. Yamanoguchi and Norihiro Samoto},
  journal={2000 IEEE Radio Frequency Integrated Circuits (RFIC) Symposium Digest of Papers (Cat. No.00CH37096)},
  year={2000},
  pages={213-216}
}
We describe a 60-GHz coplanar MMIC low-noise amplifier (LNA) using 0.1 /spl mu/m-gate-length InP heterojunction FETs (HJFETs). An optimum gate width of 80 /spl mu/m was determined for the first stage FET by using a small signal model including accurate scaling of the gate resistance. On-wafer noise measurements demonstrated a noise figure of 2.2 dB and a gain of 22.8 dB at 60 GHz. 

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