High-level Modelling , Analysis and Verification on FPGA-based Hardware Design 1

@inproceedings{MatousekHighlevelM,
  title={High-level Modelling , Analysis and Verification on FPGA-based Hardware Design 1},
  author={Petr Matousek and Ales Smrcka and Tom{\'a}s Vojnar}
}
Implementation of network components in hardware is a trend in advanced high-speed network technologies. Incoming packets can be analysed in fast programmable cards using FPGA. Designing such a system is not easy and requires a detailed analysis. In this paper, we discuss analysis and verification of a non-trivial system-the network monitor and analyser Scampi [Router] that has been developed within the Liberouter project. The Scampi analyser is implemented in FPGA on a special add-on card. It… CONTINUE READING