High-efficiency cascade based design of doherty amplifier for wireless applications


In this paper a CMOS Doherty Power Amplifier operating at 2 GHz frequency is presented. The Doherty power amplifier (DPA) maximizes the power amplifier efficiency and simultaneously maintains amplifier linearity for signals having high Peak to Average Power Ratios (pAPR). The proposed design is simulated in 180nm CMOS technology. The design consists of two… (More)

1 Figure or Table


  • Presentations referencing similar topics