High Throughput architecture for OCTAGON Network on Chip

@article{ElGhany2009HighTA,
  title={High Throughput architecture for OCTAGON Network on Chip},
  author={Mohamed A. Abd El-Ghany and Magdy A. El-Moursy and Darek Korzec and Mohammed Ismail},
  journal={2009 16th IEEE International Conference on Electronics, Circuits and Systems - (ICECS 2009)},
  year={2009},
  pages={101-104}
}
High Throughput Octagon architecture to achieve high performance Networks on Chip (NoC) is proposed. The architecture increases the throughput of the network by 17% while preserving the average latency. The area of High Throughput OCTAGON switch is decreased by 18% as compared to OCTAGON switch. The total metal resources required to implement High Throughput OCTAGON design is increased by 8% as compared to the total metal resources required to implement OCTAGON design. The extra power… CONTINUE READING

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