## FPGA implementation of a phaselet method for high speed distance relaying — Preliminary results

- Xingxing Jin, Ramakrishna Gokaraju, Eli F. Pajuelo
- 2017 IEEE Electrical Power and Energy Conference…
- 2017

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@article{Jin2018HighSD, title={High Speed Digital Distance Relaying Scheme Using FPGA and IEC 61850}, author={Xingxing Jin and Ramakrishna Gokaraju and Rudi Wierckx and O. B. Nayak}, journal={IEEE Transactions on Smart Grid}, year={2018}, volume={9}, pages={4383-4393} }

- Published 2018 in IEEE Transactions on Smart Grid
DOI:10.1109/TSG.2017.2655499

Full-cycle Fourier and cosine phasor filtering systems are typical implementations of numerical distance relays with a response time of close to one cycle. Fast subcycle numerical distance elements are useful, especially for extra high voltage/UHV transmission systems (400 kV and above). Fast subcycle numerical relaying methods such as half-cycle Fourier method, phaselets, least error squares, traveling wave, and wavelet based methods have been proposed in the literature. In this paper, first… CONTINUE READING