High-Performance Low-Power Carry Speculative Addition With Variable Latency


Adders are one of the most critical arithmetic circuits in a system and their throughput affects the overall performance of the system. Traditional n-bit adders provide accurate results, but the lower bound of their critical path delay is Ω(log n). To achieve a critical path delay lower than Ω(log n), many approximate adders have been proposed. These… (More)
DOI: 10.1109/TVLSI.2014.2355217


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