Corpus ID: 57373830

High Performance GNR Power Gating for Low-Voltage CMOS Circuits

@article{Elhmaily2019HighPG,
  title={High Performance GNR Power Gating for Low-Voltage CMOS Circuits},
  author={Hader E. El-hmaily and Rabab Ezz-Eldin and Ahmed I. A. Galal and Hesham F. A. Hamed},
  journal={ArXiv},
  year={2019},
  volume={abs/1901.00092}
}
A robust power gating design using Graphene Nano-Ribbon Field Effect Transistors (GNRFET) is proposed using 16nm technology. The Power Gating (PG) structure is composed of GNRFET as a power switch and MOS power gated module. The proposed structure resolves the main drawbacks of the traditional PG design from the point of view increasing the propagation delay and wake-up time in low voltage regions. GNRFET/MOSFET Conjunction (GMC) is employed to build various structures of PG, GMCPG-SS and GMCPG… Expand

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