High Performance Area Efficient Low Power CAM Architecture Design

@inproceedings{Remya2014HighPA,
  title={High Performance Area Efficient Low Power CAM Architecture Design},
  author={Remya},
  year={2014}
}
  • Remya
  • Published 2014
Content addressable memory (CAM) is a memory that implements the look up table function in a single clock cycle using dedicated comparison circuitry. CAM’s are composed of conventional semiconductor memory (usually SRAM) with added comparison circuitry that enables a search operation to complete in a single clock cycle. Content addressable memory offers… CONTINUE READING