Corpus ID: 110577717

High Current Matching over Full-Swing and Low-Glitch Charge Pump Circuit for PLLs

  title={High Current Matching over Full-Swing and Low-Glitch Charge Pump Circuit for PLLs},
  author={D. Wang and Ke-feng Zhang and X. Zou},
A high current matching over full-swing and low-glitch charge pump (CP) circuit is proposed. The cur- rent of the CP is split into two identical branches having one-half the original current. The two branches are con- nected in source-coupled structure, and a two-stage ampli- fier is used to regulate the common-source voltage for the minimum current mismatch. The proposed CP is designed in TSMC 0.18µm CMOS technology with a power supply of 1.8 V. SpectreRF based simulation results show the mis… Expand
2 Citations
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  • K. Moustakas, S. Siskos
  • Engineering, Computer Science
  • 2015 IEEE 13th International New Circuits and Systems Conference (NEWCAS)
  • 2015
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