Hierarchical Fault Collapsing for Logic Circuits

  title={Hierarchical Fault Collapsing for Logic Circuits},
  author={Raja K. K. R. Sandireddy},
Except where reference is made to the work of others, the work described in this thesis is my own or was done in collaboration with my advisory committee. This thesis does not include proprietary or classified information. Permission is granted to Auburn University to make copies of this thesis at its discretion, upon the request of individuals or institutions and at their expense. The process of grouping stuck-at faults into equivalence or dominance classes and then selecting one… CONTINUE READING


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