Hardware implementation of fast block matching algorithm in FPGA for H.264/AVC

@article{Kthiri2009HardwareIO,
  title={Hardware implementation of fast block matching algorithm in FPGA for H.264/AVC},
  author={Moez Kthiri and Hassen Loukil and Imen Werda and Ahmed Ben Atitallah and Amine Samet and Nouni Masmoudi},
  journal={2009 6th International Multi-Conference on Systems, Signals and Devices},
  year={2009},
  pages={1-4}
}
Motion estimation (ME) is one of the most time-consuming parts in video encoding system, and significantly affects the output quality of an encoded sequence. In this paper, we present hardware implementation of the Large Diamond Parallel search algorithm. This hardware is designed to be used as part of a complete H.264 video coding system. This architecture is simulated and tested using VHDL and synthesized using Altera Quartus II version 5.1. Also, This architecture presents minimum latency… CONTINUE READING
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