Hardware design experiences in ZebraNet

@inproceedings{Zhang2004HardwareDE,
  title={Hardware design experiences in ZebraNet},
  author={Pei Zhang and Christopher M. Sadler and Stephen A. Lyon and Margaret Martonosi},
  booktitle={SenSys '04},
  year={2004}
}
The enormous potential for wireless sensor networks to make a positive impact on our society has spawned a great deal of research on the topic, and this research is now producing environment-ready systems. [] Key Method The ZebraNet hardware is composed of a 16-bit TI microcontroller, 4 Mbits of off-chip flash memory, a 900 MHz radio, and a low-power GPS chip. In this paper, we discuss our techniques for devising efficient power supplies for sensor networks, methods of managing the energy consumption of the…
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References

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This paper discusses and evaluates ZebraNet's system design decisions in the face of a range of real-world constraints, and describes Impala's network interface which unifies media access control and transport control into an efficient network protocol.
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