Corpus ID: 55538537

Hardware Thread Accelerating Method based on CPU/FPGA Hybrid Architecture

@inproceedings{Tianzhou2007HardwareTA,
  title={Hardware Thread Accelerating Method based on CPU/FPGA Hybrid Architecture},
  author={Chen Tianzhou and Yan Like and H. Wei and Ma Ji-jun and Yan Lk},
  year={2007}
}
  • Chen Tianzhou, Yan Like, +2 authors Yan Lk
  • Published 2007
  • Computer Science
  • The CPU/FPGA hybrid architecture is a popular reconfigurable computing architecture. In order to ease the use of FPGA, a hardware thread approach is proposed, and a hardware thread executing mechanism is designed to make use of the reconfigurable resources. Software thread and hardware thread can be executed in parallel while computation-intensive tasks are assigned to hardware threads and control-intensive tasks are assigned to software threads. Simics simulator is adopted to simulate a hybrid… CONTINUE READING

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