Hardware-Based Job Queue Management for Manycore Architectures and OpenMP Environments


The seemingly interminable dwindle of technology feature sizes well into the nano-scale regime has afforded computer architects with an abundance of computational resources on a single chip. The Chip Multi-Processor (CMP) paradigm is now seen as the de facto architecture for years to come. However, in order to efficiently exploit the increasing number of on… (More)
DOI: 10.1109/IPDPS.2011.47


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