Hardened by Design Techniques for Implementing Multiple-Bit Upset Tolerant Static Memories

@article{Blum2007HardenedBD,
  title={Hardened by Design Techniques for Implementing Multiple-Bit Upset Tolerant Static Memories},
  author={Daniel R. Blum and Jos{\'e} G. Delgado-Frias},
  journal={2007 IEEE International Symposium on Circuits and Systems},
  year={2007},
  pages={2786-2789}
}
We present a novel MBU-tolerant design, which utilizes layout-based interleaving and multiple-node disruption tolerant memory latches. This approach protects against grazing incidence particle strikes, which produce disruptions with the widest possible spatial separation. Advantages with respect to size, complexity, and MBU tolerance are realized when this approach is compared to existing solutions. 
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References

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Showing 1-10 of 15 references

Three-dimensional simulation of charge collection and multiple-bit upset in Si devices

  • P. E. Dodd, F. W. Sexton, P. S. Winokur
  • IEEE Trans. on Nuclear Science, vol. 41, no. 6…
  • 2005
Highly Influential
4 Excerpts

Analysis of single event effects at grazing angle

  • A. B. Campbell, O. Musseau, V. Ferlet-Cavrois, W. J. Stapor, P. T. McDonald
  • IEEE Trans. on Nuclear Science, vol. 45, no. 3…
  • 1998
Highly Influential
3 Excerpts

A review of DASIE code family: contribution to SEU/MBU understanding

  • G. Hubert
  • Proceedings of the 11 IEEE International On-Line…
  • 2005
1 Excerpt

Monte-Carlo simulations to quantify neutroninduced multiple bit upsets in advanced SRAMs

  • T. Merelle
  • IEEE Trans. on Nuclear Science, vol. 52, no. 5…
  • 2005
2 Excerpts

Analysis of single-ion multiple-bit upset in highdensity DRAMs

  • A. Makihara
  • IEEE Trans. on Nuclear Science, vol. 47, no. 6…
  • 2000
1 Excerpt

Investigation of single-ion multiple-bit upsets in memories on board a space experiment

  • S. Buchner
  • IEEE Trans. on Nuclear Science, vol. 47, no. 3…
  • 2000
1 Excerpt

Analysis of multiple bit upsets (MBU) in CMOS SRAM

  • O. Musseau
  • IEEE Trans. on Nuclear Science,
  • 1996
2 Excerpts

Upset hardened memory design for submicron CMOS technology

  • T. Calin, M. Nicolaidis, R. Velazco
  • IEEE Trans. on Nuclear Science, vol. 43, no. 6…
  • 1996
1 Excerpt

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