H.263 mobile video codec based on a low power consumption digital signal processor

@article{Naito1998H263MV,
  title={H.263 mobile video codec based on a low power consumption digital signal processor},
  author={Yukihiro Naito and Ichiro Kuroda},
  journal={Proceedings of the 1998 IEEE International Conference on Acoustics, Speech and Signal Processing, ICASSP '98 (Cat. No.98CH36181)},
  year={1998},
  volume={5},
  pages={3041-3044 vol.5}
}
This paper describes an H.263 video codec implementation based on a low power consumption general purpose DSP. Fast algorithms, such as a fast motion estimation algorithm and a low complexity noise reduction filter, are proposed to implement the video codec on a single DSP chip maintaining sufficient picture quality. By using a 50 MIPS, 100 mW DSP, the developed codec encodes and decodes 7.5 QCIF frames per second, which is sufficient performance for low bit-rate video compression, typically… CONTINUE READING

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