Grounded active inductors design optimization for fQmax = 14.2GHz using a 130 nm CMOS technology

Abstract

This paper presents a novel design of an active inductor based on the topology of Manetakis regulated cascode active inductor. The aim of this work is to enhance the manual design of active inductors by using AIDA-C design automation methodology. The circuit is manually designed using a 130 nm CMOS technology in Cadence® to obtain an Inductor operating at 14.2GHz. The sizing of the proposed active inductor has later been optimized using AIDA-C, a state-of-the-art multi-objective multi-constraint circuit-level optimization tool. The AIDA-C circuit sizing tool was able to achieve active inductor's solutions with higher quality factor, higher inductance at the operating frequency and also higher bandwidth than the manually designed solution, with the additional surplus of presenting a set of alternative Pareto optimal solutions that enables the designer to choose the most suitable circuit.

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Cite this paper

@article{Pandey2015GroundedAI, title={Grounded active inductors design optimization for fQmax = 14.2GHz using a 130 nm CMOS technology}, author={Mrinalinee Pandey and Ant{\'o}nio Canelas and Ricardo Povoa and Jorge A. Torres and J. Costa Freire and Nuno Lourenço and Nuno Horta}, journal={2015 International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD)}, year={2015}, pages={1-4} }