Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions

@article{Zhou2014GroebnerBB,
  title={Groebner Bases Based Verification Solution for SystemVerilog Concurrent Assertions},
  author={Ning Zhou and Xinyan Gao and Jinzhao Wu and Jianchao Wei and Dakui Li},
  journal={J. Appl. Math.},
  year={2014},
  volume={2014},
  pages={194574:1-194574:15}
}
We introduce an approach exploiting the power of polynomial ring algebra to perform SystemVerilog assertion verification over digital circuit systems. This method is based on Groebner bases theory and sequential properties checking. We define a constrained subset of SVAs so that an efficient polynomial modeling mechanism for both circuit descriptions and assertions can be applied. We present an algorithm framework based on the algebraic representations using Groebner bases for concurrent SVAs… 

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References

SHOWING 1-10 OF 22 REFERENCES

Algebraic Verification Method for SEREs Properties via Groebner Bases Approaches

TLDR
The computational experience result in this work shows that the algebraic approach is a quite competitive checking method and will be a useful supplement to the existent verification methods based on simulation.

Wu's Characteristic Set Method for SystemVerilog Assertions Verification

TLDR
A verification solution based on characteristic set of Wu’s method towards SystemVerilog assertion checking over digital circuit systems and an algorithm framework based on the algebraic representations using characteristicSet of polynomial system are presented.

Identifying a Subset of SystemVerilog Assertions for Efficient Bounded Model Checking

TLDR
This paper presents an approach to prove SVAs by induction based Bounded Model Checking (BMC) and defines a subset which is sufficient for many practical purposes, since checking SVAs is computationally very complex.

Identifying a Subset of System Verilog Assertions for Efficient Bounded Model Checking

TLDR
This paper presents an approach to prove SVAs by induction based bounded model checking (BMC) and defines a subset which is sufficient for many practical purposes, since checking SVAs is computationally very complex.

Multi-Valued Model Checking via Groebner Basis Approach

  • Jinzhao WuLin Zhao
  • Computer Science
    First Joint IEEE/IFIP Symposium on Theoretical Aspects of Software Engineering (TASE '07)
  • 2007
TLDR
It is shown that Groebner bases can provide canonical symbolic representations for multi-valued logics, and therefore, can be applied to symbolicMulti-valued model checking, and a modified model checking algorithm is presented based on the algebraic representations ofmv-Kripke structures as well as mv-CTL formulas.

Application of Wu's method to symbolic model checking

TLDR
A new approach to model checking is carried out by using Wu's method to calculate the characteristic sets of polynomials that represent Kripke structures as well as CTL formulas, which is a new successful application ofwu's method.

Synthesis of System Verilog Assertions

TLDR
This paper investigates the structure of SVA properties and decomposes them into simple communicating parallel hardware units that together act as a monitor for the property, and presents an approach for synthesizing System Verilog assertions (SVA) in hardware.

Symbolic Model Checking Using Algebraic Geometry

In this paper, I show that methods from computational algebraic geometry can be used to carry out symbolic model checking using an encoding of Boolean sets as the common zeros of sets of polynomials.

Formal verification by symbolic evaluation of partially-ordered trajectories

TLDR
The general theory underlying symbolic trajectory evaluation is presented and the application of the theory to the taks of verifying switch-level circuits as well as more abstract implementations are illustrated.

The application of program verification techniques to hardware verification

TLDR
This paper examines one such program verification technique, based on the notion of symbolic execution, and then explores its application to the problem of establishing the correct behavior of a piece of hardware.