# Graph based algorithms to efficiently map VLSI circuits with simple cells

@inproceedings{Matos2018GraphBA, title={Graph based algorithms to efficiently map VLSI circuits with simple cells}, author={Jody Maick Matos}, year={2018} }

- Published 2018

This thesis introduces a set of graph-based algorithms for efficiently mapping VLSI circuits using simple cells. The proposed algorithms are concerned to, first, effectively minimize the number of logic elements implementing the synthesized circuit. Then, we focus a significant effort on minimizing the number of inverters in between these logic elements. Finally, this logic representation is mapped into a circuit comprised of only two-input NANDs and NORS, along with the inverters. Two-input… CONTINUE READING

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##### Publications referenced by this paper.

SHOWING 1-10 OF 125 REFERENCES

## Associating CMOS transistors with BDD arcs for technology mapping

VIEW 4 EXCERPTS

HIGHLY INFLUENTIAL

## M.Graph-Based Algorithms for Transistor Count Minimization in VLSI Circuit EDA Tools. Dissertation (Master’s degree on Microelectronics

VIEW 1 EXCERPT

HIGHLY INFLUENTIAL

## Near-Threshold Computing: Reclaiming Moore's Law Through Energy Efficient Integrated Circuits

VIEW 4 EXCERPTS

HIGHLY INFLUENTIAL

## Ultralow-Power Design in Near-Threshold Region

VIEW 4 EXCERPTS

HIGHLY INFLUENTIAL

## On the decreasing significance of large standard cells in technology mapping

VIEW 3 EXCERPTS

HIGHLY INFLUENTIAL