Glitch-free design for multi-threshold CMOS NCL circuits

Abstract

In this paper, a novel design is proposed for eliminating glitches and signal bounces during wake-up events that result from incorporating multi-threshold CMOS (MTCMOS) into asynchronous NULL Convention Logic (NCL) circuits. A one-stage 8x8 NCL array multiplier is designed using the proposed method and compared with the previously published paradigm… (More)
DOI: 10.1145/1531542.1531596

Topics

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