Geometric WOM codes and coding strategies for multilevel flash memories

@article{Haymaker2014GeometricWC,
  title={Geometric WOM codes and coding strategies for multilevel flash memories},
  author={Kathryn Haymaker and Christine A. Kelley},
  journal={Designs, Codes and Cryptography},
  year={2014},
  volume={70},
  pages={91-104}
}
This paper investigates the design and application of write-once memory (WOM) codes for flash memory storage. Using ideas from Merkx (1984) we present a construction of WOM codes based on finite Euclidean geometries over $${\mathbb{F}_2}$$. This construction yields WOM codes with new parameters and provides insight into the criterion that incidence structures should satisfy to give rise to good codes. We also analyze methods of adapting binary WOM codes for use on multilevel flash cells. In… 
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12 Citations
Background Citations
2
Methods Citations
2

12 Citations

Covering codes for multilevel flash memories
  • Kathryn Haymaker, C. Kelley
  • Computer Science
    2012 Conference Record of the Forty Sixth Asilomar Conference on Signals, Systems and Computers (ASILOMAR)
  • 2012
TLDR
This paper shows how to combine this method with nonbinary codes for multilevel flash cells, and introduces a new family of ternary WOM codes using the finite Euclidean geometry EG(m, 3).
Rewritable coset coding for flash memories
TLDR
It is shown that using cosets of a linear code can provide correction against uniform charge leakage, and can enhance the rewritability of flash memory which leads to fewer erasures.
$d$ -Imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs
TLDR
This paper presents WOM codes that restrict the imbalance between code symbols throughout the write sequence, hence decreasing ICI, and shows how the codes can be deployed within flash wordlines, and quantify their bit-error rate advantage using accepted ICI models.
Short \(Q\) -Ary Fixed-Rate WOM Codes for Guaranteed Rewrites and With Hot/Cold Write Differentiation
TLDR
It is shown that adding cold bits to a rewrite code has a negligible effect on the total number of writes, while adding an important feature of leveling the physical wear of memory cells between hot and cold input data.
d-Imbalance WOM Codes for Reduced Inter-Cell Interference in Multi-Level NVMs
TLDR
This paper presents WOM codes that restrict the imbalance between code symbols throughout the write sequence, hence decreasing ICI, and derives closed-form optimal write regions for codes constructed with continuous lattices.
High sum-rate three-write and non-binary WOM codes
TLDR
The main contribution in this work is a construction of binary three-write WOM codes with sum-rate approaching 1.885 for sufficiently large number of cells, while the upper bound is 2.809.
Channel Coding Methods for Non-Volatile Memories
TLDR
This monograph discusses recent advances in coding for NVMs, covering topics such as error correction coding based on novel algebraic and graph-based methods, rank modulation, rewriting codes, and constrained coding.
Channel Coding for Nonvolatile Memory Technologies: Theoretical Advances and Practical Considerations
TLDR
This survey overviews the fundamentals of channel coding and summarizes well-known codes that have been used in nonvolatile memories (NVMs) and demonstrates why the conventional coding approaches ubiquitously based on symmetric channel models and optimization for the Hamming metric fail to address the needs of modern memories.
NAND flash architectures reducing write amplification through multi-write codes
  • S. Odeh, Yuval Cassuto
  • Computer Science
    2014 30th Symposium on Mass Storage Systems and Technologies (MSST)
  • 2014
TLDR
This work proposes two novel mapping architectures that show clear advantage over known schemes using multi-write codes, and over schemes not using such codes, by evaluating them with industry-accepted benchmark traces.
Coding for Non-Volatile Memory Technologies : Theoretical Advances and Practical Considerations
TLDR
This survey overviews the fundamentals of channel coding and summarizes well-known codes that have been used in NVMs, and demonstrates why the conventional coding approaches ubiquitously based on symmetric channel models and optimization for the Hamming metric fail to address the needs of modern memories.
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