Generic Low-Latency NoC Router Architecture for FPGA Computing Systems


A novel cost-effective and low-latency wormhole router for packet-switched NoC designs, tailored for FPGA, is presented. This has been designed to be scalable at system level to fully exploit the characteristics and constraints of FPGA based systems, rather than custom ASIC technology. A key feature is that it achieves a low packet propagation latency of… (More)
DOI: 10.1109/FPL.2011.25


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