Generation of factorized symbolic network function by circuit topology reduction

@article{Djordjevic2004GenerationOF,
  title={Generation of factorized symbolic network function by circuit topology reduction},
  author={Srdjan Djordjevic and P. Petkovic},
  journal={2004 24th International Conference on Microelectronics (IEEE Cat. No.04TH8716)},
  year={2004},
  volume={2},
  pages={773-776 vol.2}
}
This paper introduces a symbolic analysis method for network function generation in nested form. The method utilises an original circuit topology graph. The network function construction implies visiting vertices of the graph in bottom-up order. There is no need to build circuit matrix and solve circuit equations. This makes the method very efficient. It is… CONTINUE READING