Generating cache hints for improved program efficiency


One of the new extensions in EPIC architectures are cache hints. On each memory instruction, two kinds of hints can be attached: a source cache hint and a target cache hint. The source hint indicates the true latency of the instruction, which is used by the compiler to improve the instruction schedule. The target hint indicates at which cache levels it is… (More)
DOI: 10.1016/j.sysarc.2004.09.004


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