Gate oxide reliability under ESD-like pulse stress

@article{Wu2004GateOR,
  title={Gate oxide reliability under ESD-like pulse stress},
  author={J. K. Wu and Elyse Rosenbaum},
  journal={IEEE Transactions on Electron Devices},
  year={2004},
  volume={51},
  pages={1192-1196}
}
The reliability of very thin gate oxide under electrostatic discharge-like pulse stress is investigated. Time-dependent dielectric breakdown of gate oxide with thicknesses ranging from 2.2 to 4.7 nm is characterized down to the nanosecond time regime. The 1/E model best fits the time-to-breakdown data. Self-heating does not need to be incorporated into the time-to-breakdown model. The oxide trap generation rate is a function of the stress pulse-width for nanosecond and microsecond stress pulses… CONTINUE READING

Figures from this paper.

Citations

Publications citing this paper.
SHOWING 1-10 OF 32 CITATIONS

Investigation of Device Damage Due to Electrical Testing

VIEW 9 EXCERPTS
CITES METHODS & BACKGROUND
HIGHLY INFLUENCED

Gate oxide evaluation under very fast transmission line pulse (VFTLP) CDM-type stress

  • 2008 7th International Caribbean Conference on Devices, Circuits and Systems
  • 2008
VIEW 4 EXCERPTS
CITES METHODS
HIGHLY INFLUENCED

Characterization of Dielectric Breakdown and Lifetime Analysis for Silicon Nitride Metal-Insulator-Metal Capacitors under Electrostatic Discharge Stresses

  • 2018 IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA)
  • 2018
VIEW 1 EXCERPT
CITES BACKGROUND

References

Publications referenced by this paper.
SHOWING 1-10 OF 36 REFERENCES

Breakdown and latent damage of ultra-thin gate oxides under ESD stress conditions

  • Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)
  • 2000
VIEW 6 EXCERPTS

TDDB on poly-gate single doping type capacitors

  • 30th Annual Proceedings Reliability Physics 1992
  • 1992
VIEW 5 EXCERPTS
HIGHLY INFLUENTIAL

Characterization and modeling of transient device behavior under CDM ESD stress

J. Willeman, A. Andreini, +13 authors L. Zullino
  • Proc. EOS/ESD Symp., 2003, pp. 88–97.
  • 2003
VIEW 1 EXCERPT

Workshop on On-Chip Protection for RF Technologies

E. Worley
  • Proc. EOS/ESD Symp., 2003.
  • 2003
VIEW 1 EXCERPT

Analysis of oxide breakdown mechanism occurring during ESD pulses

  • 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)
  • 2000
VIEW 2 EXCERPTS

Chip-level simulation for CDM failures in multi-power ICs

  • Electrical Overstress/Electrostatic Discharge Symposium Proceedings 2000 (IEEE Cat. No.00TH8476)
  • 2000
VIEW 1 EXCERPT

Experimental evidence for voltage driven breakdown models in ultrathin gate oxides

  • 2000 IEEE International Reliability Physics Symposium Proceedings. 38th Annual (Cat. No.00CH37059)
  • 2000
VIEW 1 EXCERPT