Gate-current injection and surface impact ionization in MOSFET's with a gate induced virtual drain

@article{Wong1992GatecurrentIA,
  title={Gate-current injection and surface impact ionization in MOSFET's with a gate induced virtual drain},
  author={H. P. Wong},
  journal={1992 International Technical Digest on Electron Devices Meeting},
  year={1992},
  pages={151-154}
}
  • H. P. Wong
  • Published 1992
  • Physics
  • 1992 International Technical Digest on Electron Devices Meeting
    • In this paper, gate current injection into the gate oxide of MOSFET's with a split-gate (virtual drain) structure is examined. The split-gate structure is commonly employed in flash EEPROM and CCD's. An important parameter characterizing the gate current injection is the ratio phi /sub b// phi /sub i/ (where phi /sub b/ is the effective energy barrier for electron injection into gate oxide, and phi /sub i/ is the impact ionization energy). We present new experimental data of the ratio phi /sub… CONTINUE READING
    View on IEEE
    doi.org
    5 Citations

    Figures from this paper

    Figures

    5 Citations
    Citation Type

    Citation Type

    Gate current injection in MOSFET's with a split-gate (virtual drain) structure
    • H. Wong
    • Materials Science
    • IEEE Electron Device Letters
    • 1993
    • 5
    An analytical model for the optimization of source-side injection flash EEPROM devices
    • 23
    Simulation, fabrication and characterization of a novel P-I-N-drain MOSFET structure for hot carrier suppression
    • 3
    A Design of Constant-Charge-Injection Programming Scheme for AG-AND Flash Memories Using Array-Level Analytical Model
    Design of 50nm MOSFETs with Biased Side-Gates
    • 1

    References

    SHOWING 1-10 OF 11 REFERENCES
    An Impact Ionization Model for Two-Dimensional Device Simulation
    • 31
    Analysis of the enhanced hot-electron injection in split-gate transistors useful for EEPROM applications
    • 70
    Experimental verification of the mechanism of hot-carrier-induced photon emission in n-MOSFETs using an overlapping CCD gate structure
    • H. Wong
    • Physics
    • IEEE Electron Device Letters
    • 1992
    • 9
    Design tradeoffs between surface and buried-channel FET's
    • 285
    Hot-electron-induced photon and photocarrier generation in Silicon MOSFET's
    • 271
    Substrate current at cryogenic temperatures: Measurements and a two-dimensional model for CMOS technology
    • 88
    The effect of biased spacers on LDD MOSFET behavior
    • 5
    Emission probability of hot electrons from silicon into silicon dioxide
    • 281
    Mean free path of hot electrons at the surface of boron‐doped silicon
    • 41
    A source-side injection erasable programmable read-only-memory (SI-EPROM) device
    • 15