Gate charge behaviors in N-channel power VDMOSFETs during HEF and PBT stresses

@article{Alwan2007GateCB,
  title={Gate charge behaviors in N-channel power VDMOSFETs during HEF and PBT stresses},
  author={M. Alwan and B. Beydoun and K. Ketata and M. Zoaeter},
  journal={Microelectronics Reliability},
  year={2007},
  volume={47},
  pages={1406-1410}
}
This paper reports the effects of high electric field stress (HEFS) and positive bias temperature instability (PBTI) in threshold voltage, input and Miller capacitances of N channel power VDMOSFETs. The procedure used for this study is based on the analysis of the gate charge characteristics, the two-dimensional simulation of the structure, and the physical properties of the device. The gate charge characteristics investigated during and up to 500 h of HEFS and PBTI show some degradation of… CONTINUE READING

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