Gate-all-around Si-nanowire CMOS inverter logic fabricated using top-down approach

Abstract

We present, for the first time, the monolithic integration of Gate-Ail-Around (GAA) Si-nanowire FETs into CMOS logic using top-down approach. The drive currents for N-and P-MOS transistors are matched using different number of channels for each to obtain symmetric pull-up and pull-down characteristics. Sharp ON-OFF transitions with high voltage gains (up to… (More)

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