GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing

@inproceedings{Houtgast2016GPUAcceleratedBG,
  title={GPU-Accelerated BWA-MEM Genomic Mapping Algorithm Using Adaptive Load Balancing},
  author={Ernst Houtgast and Vlad Mihai Sima and Koen Bertels and Zaid Al-Ars},
  booktitle={ARCS},
  year={2016}
}
Genomic sequencing is rapidly becoming a premier generator of Big Data, posing great computational challenges. [] Key Result This provides, compared to not using load balancing, upi¾źto +46i¾ź% more performance.

An Efficient GPU-Accelerated Implementation of Genomic Short Read Mapping with BWA-MEM

TLDR
A GPU-accelerated implementation of BWA-MEM is proposed, which obtains a twofold overall application-level speedup, which is the maximum theoretically achievable speedup.

Power-efficiency analysis of accelerated BWA-MEM implementations on heterogeneous computing platforms

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Power-efficiency of the BWA-MEM algorithm, a popular tool for genomic data mapping, is studied on two heterogeneous architectures and the base pairs per Joule unit is introduced as a measure of power-efficiency.

Improving Performance of Genomic Aligners on Intel Xeon Phi-Based Architectures

  • Shaolong ChenM. A. Senar
  • Computer Science
    2018 IEEE International Parallel and Distributed Processing Symposium Workshops (IPDPSW)
  • 2018
TLDR
A multi-level strategy (MDPR) based on data parallelization and data replication which can be easily extrapolated to other sequence alignment tools that have similar operating principles with those of BWA aligner is proposed.

MEDAL: Scalable DIMM based Near Data Processing Accelerator for DNA Seeding Algorithm

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A practical, energy efficient, Dual-Inline Memory Module (DIMM) based, NDP Accelerator for DNA Seeding Algorithm (MEDAL), which is based on off-the-shelf DRAM components and an algorithm-specific data compression technique to reduce memory footprint, introduce more space for the data mapping, and reduce the communication overhead is proposed.

Power-Efficient Accelerated Genomic Short Read Mapping on Heterogeneous Computing Platforms

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A novel FPGA-accelerated BWA-MEM implementation, a popular tool for genomic data mapping, is proposed with a two-fold speedup in overall application-level performance and a 1.6x gain in power-efficiency.

Comparative Analysis of System-Level Acceleration Techniques in Bioinformatics: A Case Study of Accelerating the Smith-Waterman Algorithm for BWA-MEM

TLDR
Three accelerated implementations of the widely used BWA-MEM genomic mapping tool are compared as a case study on design-time optimization for heterogeneous architectures, each using an optimized Smith-Waterman algorithm implementation.

On Hardware-Accelerated Maximally-Efficient Systolic Arrays: Acceleration and Optimization of Genomics Pipelines Through Hardware/Software Co-Design

TLDR
Various techniques to improve the efficiency of systolic arrays for short sequence lengths are proposed, including the Variable Logical Length, the Variable Physical Length, and the Variablelogical and Physical Length systolics array architectures are proposed to eliminate the dependence of syStolic array efficiency on read sequence length.

Accelerated HaplotypeCaller DNA Analysis Application on FPGAs Using CAPI

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A fast and efficient implementation of a Field Programmable Gate Array (FPGA) based, streaming multicore architecture for accelerating variant calling algorithms will be designed, focused on the HaplotypeCaller which is the variant calling software part of the Genome Analysis Toolkit (GATK).

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This work presents the first accelerated implementation of BWA-MEM, a popular genome sequence alignment algorithm widely used in next generation sequencing genomics pipelines, and proposes and evaluates a number of FPGA-based systolic array architectures, presenting optimizations generally applicable to variable length Smith-Waterman execution.

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