GOI fabrication for monolithic 3D integration

Abstract

A low temperature (T<inf>max</inf>&#x003D;350 &#x00B0;C) process for Ge on insulator (GOI) substrate fabrication with thicknesses of less than 25 nm is reported in this work. The process is based on a single step epitaxial growth of a Ge/SiGe/Ge stack on Si, room temperature wafer bonding, and an etch-back process using Si<inf>0</inf>.<inf>5</inf>Ge<inf>0… (More)

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