GH CORDIC-Based Architecture for Computing $N$ th Root of Single-Precision Floating-Point Number

  title={GH CORDIC-Based Architecture for Computing \$N\$ th Root of Single-Precision Floating-Point Number},
  author={Yuxuan Wang and Yuanyong Luo and Zhongfeng Wang and Qinghong Shen and Hongbing Pan},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  • Yuxuan WangYuanyong Luo H. Pan
  • Published 1 April 2020
  • Computer Science, Engineering
  • IEEE Transactions on Very Large Scale Integration (VLSI) Systems
This article presents hardware implementation for computing arbitrary roots of a single-precision floating-point number. The proposed architecture is based on Generalized Hyperbolic COordinate Rotation Digital Computer (GH CORDIC) algorithm. Benefiting from the wide range of floating-point numbers, our design is able to compute the <inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula>th root (<inline-formula> <tex-math notation="LaTeX">${N} {\ge 2}$ </tex-math></inline… 

Ultralow-Latency VLSI Architecture Based on a Linear Approximation Method for Computing Nth Roots of Floating-Point Numbers

A methodology for performing root computations on floating-point numbers based on the piecewise linear (PWL) approximation method and determines the widest segments of the subtasks and the smallest fractional width needed to satisfy the predefined maximum relative error.

Symmetric-Mapping LUT-Based Method and Architecture for Computing XY-Like Functions

A symmetric-mapping lookup table (SM-LUT) to be capable of computing inline-formula functions and an optimized Vedic multiplier to shorten the critical path and improve the efficiency of multiplication are used.

Low-Latency and Minor-Error Architecture for Parallel Computing XY-like Functions with High-Precision Floating-Point Inputs

This paper employs two specific techniques to enlarge the range of convergence of the QH CORDIC, making it possible to deal with high-precision floating-point inputs, and shows that the proposed architecture has 30 more orders of magnitude of maximum relative error and average relative error than the state-of-the-art.

Low-Complexity High-Precision Method and Architecture for Computing the Logarithm of Complex Numbers

This paper proposes a low-complexity method and architecture to compute the logarithm of complex numbers based on coordinate rotation digital computer (CORDIC). Our method takes advantage of the

PLAC: Piecewise Linear Approximation Computation for All Nonlinear Unary Functions

This article presents a piecewise linear approximation computation (PLAC) method for all nonlinear unary functions, which is an enhanced universal and error-flattened piecewise linear (PWL)

Low-Complexity and High-Speed Architecture Design Methodology for Complex Square Root

A low-complexity and high-speed VLSI architecture design methodology for complex square root computation using COordinate Rotation DIgital Computer (CORDIC), independent of angle computation in the CORDIC unlike the state-of-the-art methodologies.



Generalized Hyperbolic CORDIC and Its Logarithmic and Exponential Computation With Arbitrary Fixed Base

A generalized hyperbolic COordinate Rotation Digital Computer to directly compute logarithms and exponentials with an arbitrary fixed base is proposed and is more efficient than the state of the art which requires both ahyperbolic CORDIC and a constant multiplier.

Composite Iterative Algorithm and Architecture for q-th Root Calculation

A detailed error analysis and two architectures are proposed, for low precision q and for higher precision q, based on an optimized implementation of X^{1/q} by a sequence of parallel and/or overlapped operations.

Design and implementation of goldschmidts algorithm for floating point division and square root

The simplified single precision floating point arithmetic is used to perform division andsquare root operations and Goldschmidt's algorithm is used for performing division and square root operations.

The CORDIC Trigonometric Computing Technique

The trigonometric algorithms used in this computer and the instrumentation of these algorithms are discussed in this paper.

Design and implementation of double precision floating point division and square root on FPGAs

This paper presents the sequential and pipelined designs of a double precision floating point divider and square root unit, synthesized to produce common-denominator implementations that can be mapped on any FPGA chip regardless of architectural differences between the chips.

High-throughput CORDIC-based geometry operations for 3D computer graphics

This paper presents the formulation of representative 3D computer graphics operations in terms of CORDIC-type primitives, and briefly outlines a stream processor based on CORDic-type modules to efficiently implement these graphic operations.

50 Years of CORDIC: Algorithms, Architectures, and Applications

A brief overview of the key developments in the CORDIC algorithms and architectures along with their potential and upcoming applications is presented.

FPGA implementation of a binary32 floating point cube root

The implementation of a sequential hardware core to compute a single floating point cube root compliant with the current IEEE 754-2008 standard, based on Newton-Raphson recurrence, reciprocal and cube root units are implemented.

Decimal floating-point: algorism for computers

  • M. Cowlishaw
  • Computer Science
    Proceedings 2003 16th IEEE Symposium on Computer Arithmetic
  • 2003
This work introduces a new approach to decimal floating point which not only provides the strict results which are necessary for commercial applications but also meets the constraints and requirements of the IEEE 854 standard.

CORDIC-based VLSI architectures for digital signal processing

  • Yu-Hen Hu
  • Computer Science
    IEEE Signal Processing Magazine
  • 1992
A method to utilize a CORDIC processor array to implement digital signal processing algorithms is presented, to reformulate existing DSP algorithms so that they are suitable for implementation with an array performing circular or hyperbolic rotation operations.