• DOI:10.1109/TVLSI.2019.2959847
• Corpus ID: 212975618

GH CORDIC-Based Architecture for Computing $N$ th Root of Single-Precision Floating-Point Number

@article{Wang2020GHCA,
  title={GH CORDIC-Based Architecture for Computing \$N\$ th Root of Single-Precision Floating-Point Number},
  author={Yuxuan Wang and Yuanyong Luo and Zhongfeng Wang and Qinghong Shen and Hongbing Pan},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2020},
  volume={28},
  pages={864-875}
}

• Yuxuan Wang, Yuanyong Luo, +2 authors H. Pan
• Published 1 April 2020
• Computer Science, Engineering
• IEEE Transactions on Very Large Scale Integration (VLSI) Systems

This article presents hardware implementation for computing arbitrary roots of a single-precision floating-point number. The proposed architecture is based on Generalized Hyperbolic COordinate Rotation Digital Computer (GH CORDIC) algorithm. Benefiting from the wide range of floating-point numbers, our design is able to compute the <inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula>th root (<inline-formula> <tex-math notation="LaTeX">${N} {\ge 2}$ </tex-math></inline-formula>) of a single-precision floating-point number. After implementation, a series of tests have been carried out, including accuracy, power consumption, performance comparison, and so on. Simulation results indicate that our proposed method is capable of calculating the <inline-formula> <tex-math notation="LaTeX">${N}$ </tex-math></inline-formula>th root of a positive single-precision floating-point number with a relative error of 10⁻⁷ approximately and promises an error-flatten performance. Synthesized results from a design compiler under TSMC-40-nm CMOS technology show that our design can achieve the highest frequency of 2.38 GHz with the area consumption of <inline-formula> <tex-math notation="LaTeX">${{{140894.44 ~\mu \text {m}}}}^{2}$ </tex-math></inline-formula> and power consumption of 86.9573 mW.