GCS: High-performance gate-level simulation with GPGPUs

@article{Chatterjee2009GCSHG,
  title={GCS: High-performance gate-level simulation with GPGPUs},
  author={Debapriya Chatterjee and Andrew DeOrio and Valeria Bertacco},
  journal={2009 Design, Automation & Test in Europe Conference & Exhibition},
  year={2009},
  pages={1332-1337}
}
In recent years, the verification of digital designs has become one of the most challenging, time consuming and critical tasks in the entire hardware development process. Within this area, the vast majority of the verification effort in industry relies on logic simulation tools. However, logic simulators deliver limited performance when faced with vastly complex modern systems, especially synthesized netlists. The consequences are poor design coverage, delayed product releases and bugs that… CONTINUE READING
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