Fused Multiply-Add Microarchitecture Comprising Separate Early-Normalizing Multiply and Add Pipelines

  • David R. Lutz
  • Published 2011 in 2011 IEEE 20th Symposium on Computer Arithmetic

Abstract

We present an IEEE 754-2008 and ARM compliant floating-point micro architecture that preserves the higher performance of separate multiply and add units while decreasing the effective latency of fused multiply-adds (FMAs). The multiplier supports subnormals in a novel and faster manner, shifting the partial products so that injection rounding can be used… (More)
DOI: 10.1109/ARITH.2011.25

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