Functionally Testable Path Delay Faults on a Microprocessor

@article{Lai2000FunctionallyTP,
  title={Functionally Testable Path Delay Faults on a Microprocessor},
  author={Wei-Cheng Lai and Angela Krstic and Kwang-Ting Cheng},
  journal={IEEE Design & Test of Computers},
  year={2000},
  volume={17},
  pages={6-14}
}
gy are integrating more logic into chips while chips are operating at higher speeds. Ensuring that designs meet performance specifications requires application of delay tests. A problem of delay-testing microprocessors is that on-chip clock speed increases dramatically while the tester’s speed does not. This trend implies an increasing yield loss due to external testing since guardbanding to cover tester errors results in loss of more and more good chips. One way to resolve this problem is… CONTINUE READING
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