Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS

  title={Full-chip sub-threshold leakage power prediction model for sub-0.18 µm CMOS},
  author={Siva G. Narendra and Vivek De and Shekhar Y. Borkar and Dimitri Antoniadis and Anantha Chandrakasan},
The driving force for the semiconductor industry growth has been the elegant scaling nature of CMOS technology. In future CMOS technology generations, supply and threshold voltages will have to continually scale to sustain performance increase, control switching power dissipation, and maintain reliability. These continual scaling requirements on supply and threshold voltages pose several technology and circuit design challenges. With threshold voltage scaling sub-threshold leakage power is… CONTINUE READING
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