Full Chip False Timing Path Identification: Applications to the PowerPC TM Microprocessors

  • Jing Zengyz, Magdy S. Abadiry, Jayanta Bhadrayz, Jacob A. Abrahamz
  • Published 2001

Abstract

Static timing analysis sets the industry standard in the design methodology of high speed/performance microprocessors to determine whether timing requirements have been met. Unfortunately, not all the paths identified using such analysis can be sensitized. This leads to a pessimistic estimation of the processor speed. Also, no amount of engineering effort… (More)

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6 Figures and Tables