From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology

@article{Basu2019FromDT,
  title={From Design to Tape-out in SCL 180 nm CMOS Integrated Circuit Fabrication Technology},
  author={Joydeep Basu},
  journal={IETE Journal of Education},
  year={2019},
  volume={60},
  pages={51 - 64}
}
  • Joydeep Basu
  • Published 24 August 2019
  • Engineering
  • IETE Journal of Education
ABSTRACT Although India has achieved considerable capability in electronic chip design, but developing the infrastructure for capital-intensive semiconductor fabrication remains a challenge. The rising domestic and global demand for electronics products, the need of enhancing the country’s high-technology talent pool, employment generation, and national security concerns dictates the Indian Government’s heightened efforts in promoting electronics hardware manufacturing in the country. A recent… 
2 Citations

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