Frequency Response Mismatch Analysis in Time-Interleaved Analog I/Q Processing and ADCs

@article{Singh2015FrequencyRM,
  title={Frequency Response Mismatch Analysis in Time-Interleaved Analog I/Q Processing and ADCs},
  author={Simran Singh and Mikko Valkama and Michael Epp and Wolfgang Schlecker},
  journal={IEEE Transactions on Circuits and Systems II: Express Briefs},
  year={2015},
  volume={62},
  pages={608-612}
}
This brief examines a novel method to increase the usable analog bandwidth (BW) of an analog-to-digital interface through the use of in-phase/quadrature (I/Q) downconversion or homodyne architecture, followed by time-interleaved analog-to-digital converters (TI-ADCs) in both I and Q branches. The increased analog BW comes with the inherent drawback of various spurious components, due to analog components' frequency response mismatches, which ultimately limit the dynamic range. In this brief… CONTINUE READING

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