# Formalized Timed Automata

@inproceedings{Wimmer2016FormalizedTA, title={Formalized Timed Automata}, author={Simon Wimmer}, booktitle={ITP}, year={2016} }

Timed automata are a widely used formalism for modeling real-time systems, which is employed in a class of successful model checkers such as UPPAAL. These tools can be understood as trust-multipliers: we trust their correctness to deduce trust in the safety of systems checked by these tools. However, mistakes have previously been made. This particularly regards an approximation operation, which is used by model-checking algorithms to obtain a finite search space. The use of this operation left…

## 7 Citations

### Verified Model Checking of Timed Automata

- Computer ScienceTACAS
- 2018

This work has constructed a mechanically verified prototype implementation of a model checker for timed automata, a popular formalism for modeling real-time systems, and strives for maximal feature compatibility with the state-of-the-art tool Uppaal.

### Towards Practical Verification of Reachability Checking for Timed Automata

- Computer Science
- 2019

This work shifts the focus from verified model checking to certifying unreachability, and provides an improved modeling language that includes the popular modeling features of broadcast channels as well as urgent and committed locations.

### Verified Certification of Reachability Checking for Timed Automata

- Computer ScienceTACAS
- 2020

This paper shifts the focus from verified model checking to certifying unreachability, which allows for better approximation operations for symbolic states, and reduces execution time by exploring fewer states and by exploiting parallelism.

### Munta: A Verified Model Checker for Timed Automata

- Computer ScienceFORMATS
- 2019

The goal of Munta is to provide a reference implementation that is fast enough to test other model checkers against it on reasonably sized benchmarks, and practical enough so that it can easily be used for experimentation.

### MDP + TA = PTA: Probabilistic Timed Automata, Formalized (Short Paper)

- Computer ScienceITP
- 2018

It is proved that minimum and maximum reachability probabilities can be computed via a reduction to MDP model checking, including the case where one wants to disregard unrealizable behavior.

### A Formally Verified Monitor for Metric First-Order Temporal Logic

- Computer ScienceRV
- 2019

This work formally verify the correctness of a monitor for metric first-order temporal logic specifications using the Isabelle/HOL proof assistant and extracts an executable algorithm with correctness guarantees and uses differential testing to find discrepancies in the outputs of two unverified monitors for first- order specification languages.

### Verified Textbook Algorithms - A Biased Survey

- Computer ScienceATVA
- 2020

The state of the art of verifying standard textbook algorithms is surveyed, largely on the classic text by Cormen et al.

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A mechanized system called FVofTA (Formal Verification of Timed Automata) for specifying and reasoning about real-time systems using TA theory in PVS (Prototype Verification System) is presented.