Formalized Timed Automata

  title={Formalized Timed Automata},
  author={Simon Wimmer},
Timed automata are a widely used formalism for modeling real-time systems, which is employed in a class of successful model checkers such as UPPAAL. These tools can be understood as trust-multipliers: we trust their correctness to deduce trust in the safety of systems checked by these tools. However, mistakes have previously been made. This particularly regards an approximation operation, which is used by model-checking algorithms to obtain a finite search space. The use of this operation left… 

Verified Model Checking of Timed Automata

This work has constructed a mechanically verified prototype implementation of a model checker for timed automata, a popular formalism for modeling real-time systems, and strives for maximal feature compatibility with the state-of-the-art tool Uppaal.

Towards Practical Verification of Reachability Checking for Timed Automata

This work shifts the focus from verified model checking to certifying unreachability, and provides an improved modeling language that includes the popular modeling features of broadcast channels as well as urgent and committed locations.

Verified Certification of Reachability Checking for Timed Automata

This paper shifts the focus from verified model checking to certifying unreachability, which allows for better approximation operations for symbolic states, and reduces execution time by exploring fewer states and by exploiting parallelism.

Munta: A Verified Model Checker for Timed Automata

The goal of Munta is to provide a reference implementation that is fast enough to test other model checkers against it on reasonably sized benchmarks, and practical enough so that it can easily be used for experimentation.

MDP + TA = PTA: Probabilistic Timed Automata, Formalized (Short Paper)

It is proved that minimum and maximum reachability probabilities can be computed via a reduction to MDP model checking, including the case where one wants to disregard unrealizable behavior.

A Formally Verified Monitor for Metric First-Order Temporal Logic

This work formally verify the correctness of a monitor for metric first-order temporal logic specifications using the Isabelle/HOL proof assistant and extracts an executable algorithm with correctness guarantees and uses differential testing to find discrepancies in the outputs of two unverified monitors for first- order specification languages.

Verified Textbook Algorithms - A Biased Survey

The state of the art of verifying standard textbook algorithms is surveyed, largely on the classic text by Cormen et al.



Forward Analysis of Updatable Timed Automata

  • P. Bouyer
  • Computer Science
    Formal Methods Syst. Des.
  • 2004
It is found that it is hopeless to find a forward analysis algorithm for general timed automata, that uses such a widening operator, and which is correct, which goes really against what one could think.

A Theory of Timed Automata

Parametric real-time reasoning

This work addresses the more realistic and more ambitious problem of deriving symbolic constraints on the timing properties required of real-time systems by introducing parametric timed automata whose transitions are constrained with parametric timing requirements.

Model Checking

Model checking is applied concurrently with system design, and particularly in its early stages when systems are modelled at a high level of abstraction, because the payoff of finding bugs at that stage is highest whereas the costs are low.

Model checking

Model checking tools, created by both academic and industrial teams, have resulted in an entirely novel approach to verification and test case generation that often enables engineers in the electronics industry to design complex systems with considerable assurance regarding the correctness of their initial designs.

Untameable Timed Automata!

  • P. Bouyer
  • Computer Science, Mathematics
  • 2003
It is proved that the forward analysis algorithm implemented in these tools is not correct, but it is also proved that it is correct for a restricted class of timed automata, which has been sufficient for modeling numerous real-life systems.

A Mechanized Semantic Framework for Real-Time Systems

A logical framework for defining and validating real-time formalisms as well as reasoning methods over them and an extension to the formal semantic models mentioned above that facilitates the modeling of fine-grained time constraints of fiacre is presented.

Modelisation of Timed Automata in Coq

The modelisation of a special class of timed automata, named p-automata in the proof assistant Coq, is presented, which emphasizes the specific features of Coq which have been used, in particular dependent types and tactics based on computational reflection.

Automatic verification of real-time communicating systems by constraint-solving

In this paper, an algebra of timed processes with real-valued clocks is presented, which serves as a formal description language for real-time communicating systems. We show that requirements such as

Manipulating Clocks in Timed Automata Using PVS

  • Qingguo XuHuai-kou Miao
  • Computer Science
    2009 10th ACIS International Conference on Software Engineering, Artificial Intelligences, Networking and Parallel/Distributed Computing
  • 2009
A mechanized system called FVofTA (Formal Verification of Timed Automata) for specifying and reasoning about real-time systems using TA theory in PVS (Prototype Verification System) is presented.