Formal verification of an Intel XScale processor model with scoreboarding, specialized execution pipelines, and impress data-memory exceptions

Abstract

We present the formal verification of an Intel Xscale processor model.The Xscale is a superpipelined RISC processor with 7-stage integer, 8-stage memory, and variable-latency multiply-and-accumulate execution pipelines.The processor uses scoreboarding to track data dependencies, and implements both precise and imprecise exceptions.Such set of features had… (More)

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