Formal verification of a fully IEEE compliant floating point unit

@inproceedings{Jacobi2002FormalVO,
  title={Formal verification of a fully IEEE compliant floating point unit},
  author={Christian Jacobi},
  year={2002}
}
In this thesis we describe the formal verification of a fully IEEE compliant floating point unit (FPU). The hardware is verified on the gate-level against a formalization of the IEEE standard. The verification is performed using the theorem proving system PVS. The FPU supports both single and double precision floating point numbers, normal and denormal numbers, all four IEEE rounding modes, and exceptions as required by the standard. Beside the verification of the combinatorial correctness of… CONTINUE READING
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