Floating-Point FPGA: Architecture and Modeling

@article{Ho2009FloatingPointFA,
  title={Floating-Point FPGA: Architecture and Modeling},
  author={Chun Hok Ho and Chi Wai Yu and Philip Heng Wai Leong and Wayne Luk and Steven J. E. Wilton},
  journal={IEEE Transactions on Very Large Scale Integration (VLSI) Systems},
  year={2009},
  volume={17},
  pages={1709-1718}
}
This paper presents an architecture for a reconfigurable device that is specifically optimized for floating-point applications. Fine-grained units are used for implementing control logic and bit-oriented operations, while parameterized and reconfigurable word-based coarse-grained units incorporating word-oriented lookup tables and floating-point operations are used to implement datapaths. In order to facilitate comparison with existing FPGA devices, the virtual embedded block scheme is proposed… CONTINUE READING
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Architecture of datapath-o riented coarsegrain logic and routing for FPGAs

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DesignWare building block IP , Datapath — Floating point overview

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