Flexible hardware architecture of SEFDM transmitters with real-time non-orthogonal adjustment

@article{Perrett2011FlexibleHA,
  title={Flexible hardware architecture of SEFDM transmitters with real-time non-orthogonal adjustment},
  author={Marcus R. Perrett and Izzat Darwazeh},
  journal={2011 18th International Conference on Telecommunications},
  year={2011},
  pages={369-374}
}
Field Programmable Gate Arrays (FPGA) offer a unique combination of software abstraction and hardware performance, enabled by programming languages such as VHDL or Verilog. Inherent from this capability is a multitude of different design possibilities for a single implementation problem. A system can be designed which allows for real world evaluation at real time speeds of algorithms ordinarily restricted to simulation environments. Presented here is an FPGA implementation of a method of… CONTINUE READING
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FPGA Implementation of Quad Output Generator for Spectrally Efficient Wireless FDM Evaluation

  • M. Perrett, I. Darwazeh
  • 7th International Symposium of Broadband…
  • 2010
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