Fletcher's error detection algorithm: how to implement it efficiently and how toavoid the most common pitfalls

@article{Nakassis1988FletchersED,
  title={Fletcher's error detection algorithm: how to implement it efficiently and how toavoid the most common pitfalls},
  author={Anastase Nakassis},
  journal={Comput. Commun. Rev.},
  year={1988},
  volume={18},
  pages={63-88}
}
  • A. Nakassis
  • Published 1 October 1988
  • Computer Science
  • Comput. Commun. Rev.
In what follows we pursue the following objectives:(a) to present efficient versions of Fletcher's Arithmetic Checksum Algorithm,(b) to discuss the issues that arise when these versions are implemented,(c) to present possible implementation independent shortcomings of the algorithm, and(d) to contrast its properties to those of a CRC encoding scheme. 

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References

SHOWING 1-4 OF 4 REFERENCES

An Arithmetic Checksum for Serial Transmissions

An error-detection method for serial transmissions is presented that uses an integer arithmetic checksum that is a bit weaker at detection but is more efficient, thus representing a different and potentially useful choice in rhobust-benefit spectrum.

Notice though, that for the purposes of this algorithm, it is expedient to have many short vector registers rather than a few long ones

  • Notice though, that for the purposes of this algorithm, it is expedient to have many short vector registers rather than a few long ones

2) one addition to find the c0-contribution of our registers , (3) To add this value as is to the c0 counter and multiplied by KxM to the the cl register

  • ) one fetch to load the registers4) To conduct (K—1) mask and (K—1) sum operations on the vector registers (loop (6)) . (5) To perform three parameter initializations

To execute log_base_2(M) times a loop containing additions of vector register ranges , rotations of vector register ranges and parameter adjustments . (7) A vector addition

  • To execute log_base_2(M) times a loop containing additions of vector register ranges , rotations of vector register ranges and parameter adjustments . (7) A vector addition