Flash ADC Design in 65 nm CMOS Technology

@inproceedings{Nasrollahpour2017FlashAD,
  title={Flash ADC Design in 65 nm CMOS Technology},
  author={Mehdi Nasrollahpour},
  year={2017}
}
TIME-BASED, LOW-POWER, LOW-OFFSET 5-BIT 1 GS/s FLASH ADC DESIGN IN 65nm CMOS TECHNOLOGY By Mehdi Nasrollahpour Low-power, medium resolution, high-speed analog-to-digital converters (ADCs) have always been important block which have abundant applications such as digital signal processors (DSP), imaging sensors, environmental and biomedical monitoring devices. This study presents a low power Flash ADC designed in nanometer complementary metal-oxide semiconductors (CMOS) technology. Time analysis… CONTINUE READING