Fixed Point DSP Implementation of Low-Density Parity Check Codes

Abstract

It has been shown earlier and rediscovered recently that Low-Density Parity Check Codes can achieve bit error rate near to Shannon limit. They can be decoded using soft decision iterative decoding scheme. As low cost, high performance DSPs are widespread, DSP implementation for LDPC decoder is a viable option. Floating point implementation has higher costs… (More)

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Cite this paper

@inproceedings{Bhatt2000FixedPD, title={Fixed Point DSP Implementation of Low-Density Parity Check Codes}, author={Tejas Bhatt and Krishna Narayanan and Nasser Kehtarnavaz}, year={2000} }