Five-Step (Pad–Pad Short–Pad Open–Short–Open) De-Embedding Method and Its Verification

@article{Kang2009FiveStepS,
  title={Five-Step (Pad–Pad Short–Pad Open–Short–Open) De-Embedding Method and Its Verification},
  author={I. M. Kang and S. Jung and Tae-Hoon Choi and Jae-Hong Jung and Chulho Chung and Han-Su Kim and Hansu Oh and Hyun Woo Lee and Gwangdoo Jo and Young-Kwang Kim and Han-Gu Kim and Kyu-Myung Choi},
  journal={IEEE Electron Device Letters},
  year={2009},
  volume={30},
  pages={398-400}
}
We present the method for five-step (pad-pad short-pad open-short-open) on-chip parasitic de-embedding. Its validation is verified by gate electrode resistance and input capacitance of transistors based on 45 -nm CMOS process. Optimized dummy structures to remove the parasitic components due to the pad and routing metal are proposed. Parameters extracted by the proposed method have excellent physical and theoretical trends. 
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