Fine-Grain Time Division Multiplexing in FPGAs

Abstract

Increase in FPGA capacity combined with CMOS technology scaling has resulted in increased demands on the configurable wiring architecture. Modern FPGAs typically give over 50% of the reconfigurable area over to routing resources. Rent’s Rule [1,2] implies that static FPGA wiring is not scalable and we are approaching the point where cross chip communication… (More)

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