Few electron limit of n-type metal oxide semiconductor single electron transistors.

  title={Few electron limit of n-type metal oxide semiconductor single electron transistors.},
  author={Enrico Prati and M De Michielis and M. Belli and Simone Cocco and Marco Fanciulli and D. Kotekar-Patil and M. Ruoff and Dieter P. Kern and D. A. Wharam and J. Verduijn and Giuseppe Carlo Tettamanzi and Sven M. J. Rogge and B. Roche and Romain Wacquez and Xavier Jehl and Maud Vinet and Marc Sanquer},
  volume={23 21},
We report the electronic transport on n-type silicon single electron transistors (SETs) fabricated in complementary metal oxide semiconductor (CMOS) technology. The n-type metal oxide silicon SETs (n-MOSSETs) are built within a pre-industrial fully depleted silicon on insulator (FDSOI) technology with a silicon thickness down to 10 nm on 200 mm wafers. The nominal channel size of 20 × 20 nm(2) is obtained by employing electron beam lithography for active and gate level patterning. The Coulomb… 

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